Analog IC Design Engineer

BBBH17931_1727465014
  • US$120000.00 - US$200000.00 per annum
  • Toronto, Ontario

Join a start-up specializing in developing chips for AI computing, harnessing light's unique properties to create fast and efficient inference and training engines. Engineers and scientists passionate about innovation, solving complex technical challenges, and making a significant impact are invited to explore opportunities. Imagine contributing to pioneering efforts such as developing the inaugural optical computers. Be part of revolutionizing AI computing through cutting-edge technology and groundbreaking solutions.

Join the analog team at the forefront of developing the world's first photonic computers. This role requires deep expertise in mixed-signal and analog design, complemented by broad knowledge in photonics, digital electronics, semiconductor device physics, thermal management, packaging, and machine learning. The ideal candidate will be eager to expand their skills across these diverse areas.

Job Description: Lead Analog Engineer

Roles and Responsibilities:

  • Support chip architects in micro-architecture development through feasibility studies.
  • Collaborate with diverse design teams (packaging, digital, analog, photonics) to define chip partitions.
  • Lead top-level design, including schematic/layout hierarchy and floor planning.
  • Integrate circuit IPs across analog, digital, and photonics blocks.
  • Develop strategies for Power Delivery Network (PDN), ESD protection, and testing.
  • Oversee layout verification for successful tape-out.
  • Coordinate with Program Managers to meet project timelines and deliverables.

Qualifications:

  • MS with 8+ years or Ph.D. with 5+ years in Analog/Mixed-signal IC design.
  • Extensive semiconductor industry experience in analog and mixed-signal circuit design.
  • Track record leading multiple chip designs and tape-outs.
  • Proficiency in mixed-signal verification methodologies and integration flows.
  • Familiarity with packaging effects, ESD structures, and high-frequency circuit layout.
  • Experience with Cadence Design Environment and analog circuit testing in a lab.
Hatley Loop Researcher

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