Senior Design Verification Engineer:
Acceler8 Talent is seeking an impressive Senior Design Verification Engineer to join a top tier semiconductor company. Leverage your expertise in the latest Design Verification (DV) methodologies to drive the verification process.
Responsibilities:
- Develop comprehensive DV test plans based on specifications, devising effective DV strategies
- Build robust test benches and infrastructure to facilitate thorough design verification
- Develop and execute test cases to validate the design, achieving optimal coverage
- Collaborate closely with RTL engineers to identify and address any RTL/GLS/Silicon failures
- Utilize UPF for Power Aware simulation, verifying power integrity in the design
- Drive formal verification efforts and execute formal verification plans
- Develop C-based driver APIs for subsystem utilization
- Stay updated with emerging DV methodologies, contributing to the development of new approaches
Requirements:
- 5+ years of hands-on experience in Design Verification (DV) of complex IP used in subsystems
- Proficiency in the latest DV methodologies, including Formal Verification, SystemVerilog/UVM, and Power Aware verification using UPF
- Strong track record of developing DV plans, creating test benches, and executing tests to verify designs
- Exceptional debugging skills and familiarity with industry-standard simulation and debug tools (e.g., VCS)
- Additional Experience (Preferred):Mixed-signal simulation knowledge
- Demonstrated ability to develop and implement new DV methodologies
