Digital Design Engineer (Front End ASIC)

Location San Francisco
Discipline: Hardware Acceleration Jobs
Job type: Permanent
Salary: US$180000 - US$250000 per annum
Contact name: Nicolas Roselli

Contact email:
Job ref: BBBH8711_1640107637
Published: 30 days ago

We are a well-funded MIT spinout (about to announce our Series B well over $100 million) whose vision is to bring their unique patented photonic technology for the global market.

As a Senior Digital Design Engineer, you will work very closely with their hugely bright team hailing from top Universities (MIT, Berkeley, Georgia Tech) and commercial backgrounds (Google, Microsoft Research) working at the intersection of Deep Learning and Optical AI Accelerators.

What we can offer a Senior Digital Design Engineer (RTL, ASIC):

  • A chance to play a large part in implementing technology that will change the future of machine learning.
  • A fantastic onsite work location in Boston, MA or San Francisco Bay (remote working offered).
  • A collaborative work culture, that not only shares the same vision but consistently works together to achieve that vision.
  • Excellent benefits and share options.

Key Skills: Digital Design, RTL, System Verilog, ASIC Design, SoC, Machine Learning, Accelerators, Memory Systems, PCIe.