Lead DFT Engineer

Location Pleasanton
Discipline: Hardware Acceleration Jobs
Job type: Permanent
Salary: US$200000 - US$240000 per annum + Equity package
Contact name: Jake Whitcomb

Contact email: jwhitcomb@acceler8talent.com
Job ref: BBBH13239_1674515460
Published: 13 days ago
Startdate: ASAP

Acceler8 Talent is actively seeking a DFT Expert to join one of the fastest growing AIoT Acceleration companies in the US.

Since being founded in 2019 by an industry veteran, They have closed their series C, completed one successful tapeout and are one of the first semiconductor companies in the US to have a partnership with ARM and have access to their latest cores.

This company has trademarked two devices that offers developers a single chip solution when designing entire complex systems that require accelerated AI/ML edge processing, wireless connectivity, and memory capacity. Substantially reducing power consumption and cost efficiency.

Responsibilities

  • Define & document DFT requirements/Specifications for IP/Block and Chip level
  • Execute DFT Lint to identify scan DRC violations and resolution
  • Plan and Insert MBIST and memory repair
  • Generate and port IJTAG ICL/PDL and STIL patterns for MBIST, ATPG, and JTAG tests
  • Expert knowledge of Mentor Tessent toolchain

Requirements

  • 7+ years of proven DFT execution experience on mixed-signal SoC with first-pass silicon success
  • Expertise in using Cadence for scan stitching and Mentor Tessent tool suite for DFT implementation
  • Hands-on hierarchical DFT flow experience from RTL to netlist
  • Experience in inserting EDT, wrapper cells, and OCC
  • Experience in analyzing DFT DRC violations and fault coverage analysis