Principal Design Verification Engineer

Location Santa Clara
Discipline: Hardware Acceleration Jobs
Job type: Permanent
Salary: US$240000 - US$260000 per annum + Equity
Contact name: Cassie Cavender

Contact email:
Job ref: BBBH11472_1655297997
Published: 13 days ago

Principal Design Verification Engineer

Acceler8Talent is seeking a skilled, driven Principal Design Verification Engineer to join a start-up that is attacking the physics of in-memory compute to accelerate AI at the edge. They have just raised a substantial series A round, which will provide a runway for a couple of years led by tier 1 VCs and industry leaders, and have taped out their first chip, with the design and development of their second chip underway.

They can offer a competitive salary that consists of base + bonus + equity. This position can be fully remote.

Desired Qualifications:

  • Master's Degree in EE or CS with 8+ years of relevant experience
  • Experience through full chip life cycle verifying large-complex SoCs
  • Industry experience in ASIC-SoC Design verification tests and debugging
  • Knowledge of assertion methodology, SystemVerilog, coverage, and randomization constraints
  • Leading creation/implementation of multiple SoC verification environments and tape out efforts successfully is a plus
  • UVM/OVM expertise