Senior Principal Design Verification Engineer

Location Fremont
Discipline: Hardware Acceleration Jobs
Job type: Permanent
Salary: US$200000 - US$225000 per annum + + Bonus + Equity
Contact name: Luke Tomaszko

Contact email:
Job ref: BBBH9275_1678117023
Published: 18 days ago
Startdate: 04/06/2023

Acceler8 Talent is seeking a Senior Principal Design Verification Engineer to join an AI acceleration that is pioneering in-memory computing to accelerate AI at the edge.

This company has raised a large series-A round to give them runway for a couple of years and plan to bring their first chip to market in 2023.


  • Transform product vision and behavioral specifications into efficient block-level and top-level tests
  • Incorporate state of the art verification techniques to tackle scaling and performance requirements
  • Define and implement infrastructure for HW/SW co-simulation.
  • Perform verification strategy to ensure prototypes meet device and system level requirements


  • 10+ years industry experience in design verification
  • Expertise verifying chip and block-level designs for high-performance networking chips
  • Strong experience with full chip verification and infrastructure development.
  • Expertise in SystemVerilog and experience with Python, Perl or another scripting language.
  • Proven experience of quality, timely delivery of work on "shipped products"
  • Excellent knowledge of UVM

The ideal candidate will have the versatility to build infrastructure and tests for both ASIC and FPGA platforms. C++ or SystemC knowledge is also highly desirable.

They are looking for someone to start right away and are offering $200k-$225k base with bonus & equity package. Please apply here or contact Luke at to hear more.