Based in Downtown Campbell, CA we're looking for a Senior/Principal Micro-Architect to join a well-funded start-up ($36 million) whose vision is to redefine the interface between processor hardware and the compiler. Their technology drastically reduces power consumption and improves general-purpose microprocessor performance by eliminating the Instruction Set Architecture and leveraging next-generation compiler advancements.
As a Senior ASIC Design Engineer/Micro-architect, you'll design and implement high-performance CPU blocks from concept to production. You'll also be responsible for defining the microarchitecture, RTL coding, synthesis, and pre/post-silicon debug and timing closure. We're looking for someone with 7+ years of experience working on complex chips (ARM, AMD, IBM, Intel, Apple, etc.)
What can be offered to a Senior/Principal Micro-Architect:
- An opportunity to help push the envelope on cutting-edge compiler technology.
- Competitive base salary + equity packages.
- Lead and build a team of brilliant engineers with the goal of pushing the limits of microprocessor performance.
Key Skills: RTL Design, SoC Development, High-Performance Design, Low-power microarchitecture, Verilog/System Verilog, Synthesis, Static Timing Analysis, Debugging.