Acceler8 Talent is seeking a Senior Timing Analysis Engineer to join one of the world's leading semiconductor and mobile communication companies.
As a Timing Analysis Engineer, you will be joining an Austin based team to perform high-performance CPU timing analysis sign-off, timing closure and power recovery.
- 5+ years' experience in static timing analysis of high performance CPU's
- Strong experience with multi-scenario STA and timing constraints.
- Experienced in hierarchical design, budgeting, multiple voltage and clock domains.
- Excellent understanding of margining methodologies (OCV/AOCV/POCV)
- Experience with design closure across a wide range of operating points (multi-OPP)
- Experience with clock tree analysis and drive physical implementation.
- Experience with custom recipe development for timing closure and power recovery in sign-off tool environment.
- Knowledge of low-power techniques & familiarity with multi-voltage island design specification.
- Strong scripting skills in tcl, perl, or python.)
- Strong skills with Cadence and Synopsys timing sign-off flows.
Addition useful skills
- Familiarity with implementation flows
- IR Drop analysis (Static & Dynamic)
- ARM CPU STA experience