Staff Design Verification Engineer

Location Boston
Discipline: Hardware Acceleration Jobs
Job type: Permanent
Salary: US$175000 - US$225000 per annum + + Equity
Contact name: Luke Tomaszko

Contact email:
Job ref: BBBH9275_1678117547
Published: 18 days ago
Startdate: 04/06/2023

Acceler8 Talent is seeking an experienced Design Verification Engineer to join an exciting and well funded hardware acceleration start-up that is developing a new interconnect architecture to reduce congestion in massively distributed systems, helping to keep up with the increasing demands of modern computing.

They have raised a substantial series A round and have plans to bring their first chip to market later this year.


  • Transform product vision and behavioral specifications into efficient block-level and top-level tests
  • Incorporate state of the art verification techniques to tackle scaling and performance requirements
  • Define and implement infrastructure for HW/SW co-simulation.
  • Perform verification strategy to ensure prototypes meet device and system level requirements


  • 6+ years industry experience in design verification
  • Expertise verifying chip and block-level designs for high-performance networking chips
  • Strong experience with full chip verification and infrastructure development.
  • Expertise in SystemVerilog and experience with Python, Perl or another scripting language.
  • Proven experience of quality, timely delivery of work on "shipped products"
  • Excellent knowledge of UVM

Experience with FPGA design flow/verification a strong plus. The ideal candidate will have the versatility to build infrastructure and tests for both ASIC and FPGA platforms. C++ knowledge is also highly desirable.

They are looking for someone to start ASAP and are offering $175k-$225k base with a very generous equity package. Please apply here or contact Luke at to hear more.