Acceler8 Talent is seeking a Staff RTL Design Engineer to join a well funded ($50m series A) hardware acceleration start-up whose vision is to eliminate any bottlenecks in distributed systems with a new switched fabric architecture.
- Own block design, from analysis of the design approach through to RTL implementation.
- Deliver high performance, robust design to meet timing, testability and power requirements
- Outline functional and performance requirements in the development of high throughput engines
- Support verification, from development of test plans through to execution of the testing phases.
- Support silicon bring up and post-silicon testing
- 5+ years industry experience in logic design, from design specification to RTL design to implementation.
- Familiarity with P+R constraints, synthesis and static timing analysis
- Expertise in SystemVerilog and good knowledge of Python, Perl or other scripting language.
They are looking for someone to start ASAP and are offering $180k-$220k base with a generous equity package.
Please apply here or contact Luke at firstname.lastname@example.org if you would like to hear more.