Physical Design Engineer
GW191
Posted: 05/01/2026
- $180,000-$250,000
- Canada
- Permanent
About the job
Acceler8 Talent is working with an AI Hardware Startup developing next-generation AI hardware designed for efficiency, scalability, and performance across edge-to-cloud computing environments. Their technology brings together advanced architectures and streamlined software integration to enable high-performance AI in power- and space-constrained systems. Weโre seeking a Senior Physical Design Engineer with deep expertise in chip-level implementation and EDA tools to help deliver industry-leading silicon.
Responsibilities include:
- Leading physical design activities across chip and block levels, driving successful implementation from floorplanning through signoff
- Managing timing closure, physical verification, and optimization for power, performance, and area
- Developing and refining low-power design strategies and ensuring proper integration across design hierarchies
- Running and debugging EM/IR checks, power grid analysis, and related reliability verifications
- Writing and maintaining automation scripts (Tcl, Python, or similar) to streamline design flows and validation steps
- Collaborating with front-end design, CAD, and methodology teams to ensure robust and scalable implementation practices
- Evaluating and improving physical design methodologies and EDA tool flows for new process technologies
Ideal background:
- 10+ years of direct experience in physical design and chip implementation (excluding logic design or CAD roles)
- Strong, hands-on knowledge of EDA tools- particularly Cadence- used in chip implementation
- Proven expertise in timing analysis, timing closure, and hierarchical floorplanning
- Solid understanding of low-power design principles and debugging methodologies
- Experience with EM/IR analysis and issue resolution, including power grid verification
- Proficiency in scripting languages such as Tcl and Python for automation and flow development
- Familiarity with physical verification processes and foundry tapeout requirements
- Additional experience with PDK management or advanced flow evaluations is a plus
Mia Macdonald
Semiconductor & Chip Design Recruiter