Principal Design Verification Engineer

Acceler8 Talent is looking for an experienced Design Verification Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you!

Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success.

As a Design Verification Engineer, you’ll be contributing to the verification methodology and execution across blocks, subsystems, full chip, and system-level validation. You’ll own portions of the verification execution at the subsystem and chip level, creating testbenches and executing progress and verification closures toward various silicon milestones. This is a hybrid role based in the San Francisco Bay Area.

This role might be ideal for you if you have:

• Experience driving verification from concept-to-silicon

• Knowledge of LPDDR/HBM

• Production experience with advanced verification methodologies (UVM, AVB, formal verification, etc.)

• Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities

• 5+ years working in design verification roles

Familiarity with emulation and prototyping platforms and methodologies and hands-on experience with participation in silicon debugging and bring-up are pluses!

Base Salary: $200,000 - $300,000 + equity + benefits