RTL Design Engineer

MM073020256
  • $215,000-$250,000
  • Santa Clara, CA
  • Permanent

VLSI Design Engineer | Bay Area, CA (On-site)



A fast-growing edge AI hardware startup is seeking a VLSI Design Engineer to contribute to the design and development of high-performance inference processors and on-chip interconnects. This is a hands-on role working on cutting-edge semiconductor technology in a fast-paced, collaborative environment.


Key Responsibilities:

  • Define micro-architectures     and implement RTL in Verilog/SystemVerilog  
  • Develop and integrate digital     IP into SoCs  
  • Perform synthesis, static     timing analysis, LEC, and power optimizations  
  • Debug and verify complex     digital designs in collaboration with verification teams 
  • Work on high-speed interfaces     (DDR, PCIe, USB) and custom processor subsystems


Qualifications:

  • Bachelor’s or Master’s in     Electrical/Computer Engineering  
  • 5+ years of RTL design     experience  
  • Expertise in digital logic,     synthesis, timing closure, and design verification  
  • Proficient with tools like     Synopsys DC, Cadence Genus, VCS, QuestaSim  
  • Skilled in Python, Perl, or     TCL scripting


Join a team redefining AI performance at the edge. Ideal for engineers passionate about pushing hardware to its limits.

Mia Macdonald Semiconductor & Chip Design Recruiter

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