Senior Optical Test Engineer- Optical Transceivers

GW86
  • $230,000-$260,000
  • San Francisco, CA
  • Permanent

About the job


Acceler8Talent is proud to partner with a well-funded, VC-backed AI/networking hardware startup in the SF Bay area that’s redefining infrastructure for the world’s largest hyperscalers. Operating under a Joint Development Model (JDM), this company co-develops highly customized networking hardware, optics, and software solutions tailored to the evolving needs of large-scale AI workloads in data centers.


With over $110M in funding and rapid expansion underway, they're now looking to hire a Senior Optical Test Engineer to lead the qualification, validation, and system-level testing of high-speed optical modules (e.g., 400G, 800G, 1.6T) used in advanced datacenter and AI networking environments.


Responsibilities

  • Lab Bring-Up and Test Automation: Setup and maintain test environments using BERTs, power meters, oscilloscopes, and traffic generators. Automate workflows using Python.
  • Optical Module Qualification: Test and characterize transceivers across temperature, voltage, and traffic conditions to ensure performance and compliance.
  • System-Level Validation: Validate module performance in switch ASIC systems and AI networking setups. Capture metrics like BER, power consumption, thermal stability, and link reliability under stress.
  • Debug and Analysis: Troubleshoot performance issues such as signal integrity degradation, module misbehavior, or unexpected power/thermal behavior. Collaborate with cross-functional teams for root-cause analysis.


Requirements

  • B.S. or M.S. in Electrical Engineering, Optical Engineering, Physics, or a related field
  • 5+ years of experience testing optical modules or electrical/optical systems
  • Hands-on experience in high-speed optical transmission testing, including fiber links, and state of the art test equipment: BERT, oscilloscope, DCA, power meters, OSA, thermal chambers
  • Strong Python scripting skills for lab automation and programming languages for data collection and analysis
  • Familiarity with CMIS, MDIO, or I²C interfaces
  • Understanding of high-speed protocols such as Ethernet, PCIe, or SerDes
  • Industry experience working with 400G/800G/1.6T pluggable modules (QSFP-DD, OSFP)
  • Knowledge of IEEE 802.3 Ethernet, MSA or OIF standards including CMIS
  • Experience validating hardware in datacenter or AI cluster environments
  • Familiarity with environmental and reliability testing (temperature cycling, HTOL, etc.)


Drew Cummings Semiconductor & Chip Design Recruiter

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