RTL Design Manager

A rapidly scaling AI hardware company is hiring an SoC Microarchitecture & RTL Design Leader to help drive development of a next-generation compute platform built to support the largest and most demanding machine learning workloads.

This organization is building vertically integrated solutions spanning silicon, systems, and software to power frontier AI. This role offers the opportunity to lead a high-impact team shaping complex SoC designs at the heart of advanced AI infrastructure.

What You’ll Do

• Lead and grow a team of micro-architects and RTL designers responsible for subsystem and chip-level SoC development
• Recruit, mentor, and retain top silicon design talent
• Partner with cross-functional leaders across silicon, software, systems, and ML to co-own delivery of complex AI hardware platforms
• Oversee development of production-ready microarchitecture and frontend RTL, ensuring clean handoff to verification, physical design, DFT, and related downstream teams
• Establish and manage effective design flows and stakeholder handoffs
• Participate in IP evaluation and vendor/tool selection for silicon development
• Collaborate with executive leadership on hiring plans, budgeting, and resource strategy
• Conduct deep technical design reviews within your team and across disciplines

What We’re Looking For

• Proven concept-to-production experience delivering ASIC/SoC subsystems and/or full-chip designs from architectural specification through tapeout
• Experience building and managing high-performing RTL and silicon design teams
• Track record of success in fast-paced, highly cross-functional environments with shared ownership of complex silicon, software, and systems
• Ability to operate as a hands-on technical leader: comfortable diving into microarchitecture and RTL when needed and engaging in detailed technical debate
• Strong coding background in SystemVerilog, Python, C/C++, Bluespec, or similar languages used in chip development flows
• Demonstrated leadership and technical delivery experience in high-performance compute domains (CPUs, GPUs, accelerators), high-speed interconnect, memory management, and related architectures

Preferred Background:

• Experience in both startup and large-scale organizational environments
• Prior leadership experience in high-growth hardware startups

This is a high-visibility leadership role for engineers who want to build and scale silicon teams delivering foundational compute technology for the future of AI.