Senior Physical Design Engineer

A cutting-edge AI semiconductor company is hiring Silicon Physical Design Engineers to join its growing hardware team. This organization is focused on building highly efficient, high-performance silicon to power advanced generative AI systems at scale.

If you’re driven by complex implementation challenges and want your work to directly enable the next wave of AI innovation, this role offers meaningful technical ownership and end-to-end impact.

What You’ll Do:

• Help evolve and scale physical design methodology across blocks, subsystems, and full-chip implementations from RTL through GDSII
• Take ownership of subsystem and/or chip-level physical design execution, including: partitioning, floorplanning, synthesis, place & route, clock tree implementation, and full sign-off (equivalency, extraction, timing, power estimation, EMIR, physical verification)
• Lead planning and milestone reviews, tracking progress toward key silicon deliverables including design freeze and tapeout
• Partner closely with Design, DFT, and fellow Physical Design engineers to optimize Performance, Power, and Area (PPA) across leading-edge process nodes
• Contribute to delivery of robust, production-ready silicon spanning compute, memory management, high-speed connectivity, and related technologies

What You Bring:

• Bachelor’s degree in Electrical Engineering or equivalent
• 8+ years of ASIC Physical Design experience in industry
• Demonstrated expertise driving block, subsystem, and/or full-chip physical design from early RTL through production silicon
• Strong experience with construction and sign-off flows, with a track record of achieving PPA targets
• Proven collaboration with Design, Verification, and DFT teams to structure, partition, and optimize implementations
• Proficiency in Perl, Python, TCL, or similar scripting languages
• Strong communication and cross-functional collaboration skills
• Experience partnering with third-party design services providers

This is an opportunity to play a critical role in delivering advanced silicon that directly accelerates AI capability and efficiency. Engineers who thrive in ownership-driven environments and enjoy solving large-scale implementation challenges will find this particularly compelling.