Design Verification Engineer
- $200,000 - $320,000
- San Francisco Bay Area
- Permanent
Design Verification Engineer β Mountain View, CA (Onsite)
I'm currently hiring for an early-stage AI infrastructure startup building next-generation AI compute hardware from the silicon up. They're developing a brand-new AI-native compute platform designed to power the next wave of large-scale AI systems, giving engineers the opportunity to work on bleeding-edge architecture alongside some of the industry's top hardware talent.
They're looking for experienced Design Verification Engineers who enjoy building from first principles rather than maintaining existing infrastructure. This is a rare opportunity to own verification methodology from day one, develop scalable verification environments from scratch, and work across block and SoC verification on a completely new AI compute architecture in a highly technical startup environment.
What they're looking for:
- 5+ years experience
- Experience building verification environments and UVM infrastructure from scratch
- Strong debugging skills across RTL and system-level issues
- Experience with modern SoC architectures, interconnects and verification methodologies
- Experience with high-performance compute, AI accelerators, CPUs or GPUs is a strong plus
- Exposure to emulation, post-silicon bring-up or high-speed interfaces such as PCIe or DDR is beneficial
Important details:
- Fully onsite in Mountain View, CA
- $200K-320K base +equity
Be sure to apply to find out more!