Staff Design Verification Engineer

Acceler8 Talent is looking for an experienced Design Verification Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you!

Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success.

As the Design Verification Engineer, you’ll be contributing to the verification methodology and execution across blocks, subsystems, full chip, and system-level validation. You’ll own portions of the verification execution at the subsystem and chip level, creating testbenches and executing progress and verification closures toward various silicon milestones. This is a hybrid role based in the San Francisco Bay Area.

This role might be ideal for you if you have:

• Expertise in UVM and hybrid SoC testbench development
• Experience integrating cycle-accurate models
• Proven ability to design and implement simulation acceleration techniques
• Proven record of building reusable, scalable verification components across platforms (simulation, emulation, and post-silicon)
• Comfortable working across cross-functional teams
• Familiarity working at the system-level 
• Interest in working with an AI tools

Familiarity with emulation and prototyping platforms and methodologies, hands-on experience with participation in silicon debugging and bring-up, and Rust are pluses!